Test termination: Streamline the definitions of termination sequences.

Created by: zchamski

This PR aims at streamlining the handling of termination sequences so that they systematically use the RISC-V HTIF convention of writing an odd value into variable tohost.

The termination sequence cannot reliably stop on a wfi instruction because in CVA6 its behavior depends on the current privilege level and even the presence of alarms. Therefore, the write of the termination value into tohost is followed by a jump-to-self loop. As a consequence, the testbench is resposible for detecting the writes into tohost and for eventually stopping the simulation when the bit 0 of tohost was set.

This PR addresses the code generation side of test termination. It does so by modifying the patches (riscv-tests, riscv-compliance), the installation scripts (riscv-isa-sim), and by adding minimal, overrideable startup/termination functions to the custom BSP.

Files changed/added:

• cva6/regress/install-riscv-arch-test.sh: Complain if Spike is not installed alongside its source code. Copy Spike target definitions to corresponding riscv-arch-test target directory.
• cva6/regress/riscv-compoliance.patch: Update to use write-into-tohost termination.
• cva6/regress/riscv-tests-env.patch: Do not set up ECALL arguments.
• cva6/regress/smoke-tests.sh: Add cv32a60x version of hello_world to check sanity of 32b custom BSP support.
• cva6/tests/custom/common/crt.S (handle_trap): Add default overrideable definition. (_init): Likewise. (exit): Likewise. (_exit): New.
• cva6/tests/testlist_riscv-arch-test-cv32a60x.yaml: Use target definitions copied from Spike tree upon arch-test installation.
• cva6/tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml: Likewise.(_exit): New.