Include Imperas DV Functional Coverage (!1716) · Merge requests · OpenHW Group / backup-20241120 / core-v-verif

Eclipse Webmaster requested to merge github/fork/duncangraham-Imperas/cv32e40s/dev into cv32e40s/dev Mar 10, 2023

Created by: duncangraham-Imperas

The addition of trace2cov allows functional coverage using riscvISACOV to be used

Clone the repository github.com/Imperas/ImperasDV-OpenHW and view the file scripts/cv32e40s/README.run.txt for full information on how to enable

No additional System Verilog is included unless it is compiled with +define+INCLUDE_TRACE2COV

Some information is included here

COVERAGE_ENABLE="\
    +define+INCLUDE_TRACE2COV \
    +incdir+${IMPERAS_HOME}/ImpProprietary/source/host/riscvISACOV/source \
    +define+COVER_BASE_RV32I \
    +define+COVER_LEVEL_DV_PR_EXT  \
    +define+COVER_RV32ZCA \
    +define+COVER_RV32ZCMP \
    +define+COVER_RV32ZCMT \
"
# for zc_test
export CV_SW_MARCH=rv32im_zicsr_zifencei_zcmp

make clean test TEST=zc_test \
   USER_COMPILE_FLAGS="${COVERAGE_ENABLE}" \
   USER_RUN_FLAGS="+TRACE2COV_ENABLE=1" \
   USE_ISS=yes \
   COV=yes \
   CV_CORE=${CV_CORE}

# The coverage can be viewed with
make cov TEST=zc_test GUI=1

Include Imperas DV Functional Coverage

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