Add unified tracking of simulator elaboration and simulation performance

Created by: zchamski

Add a means of tracking the performance of simulators used in verification, both in terms of model elaboration/compilation time, and of simulation time proper. The collected performance data are added to the simulator log file, typically cva6/sim/out_<date>/<simtarget>_sim/*.log.iss.

Changelog

• cva6/sim/Makefile (TIME_CMD): New. (vcs-testharness): Add timing command defined as $(TIME_CMD). (veri-testharness): Ditto. (vcs_uvm_comp): Ditto. (vcs_vm_run): Ditto.

Signed-off-by: Zbigniew Chamski zbigniew.chamski@thalesgroup.com