Instruct DASM to use the correct 32/64b ISA for current target. (!1418) · Merge requests · OpenHW Group / backup-20241120 / core-v-verif

Eclipse Webmaster requested to merge github/fork/zchamski/pr-candidate/dasm-isa-selection into cva6/dev Sep 15, 2022

Created by: zchamski

Fix incorrect disassembling of 32-bit traces in presence of compressed instructions. By default spike-dasm uses the RV64GC ISA to disassemble the raw opcodes. However, on RV32C the bit patterns of several compressed instructions have a meaning different from the one on RV64(G)C. Wit the default setting of spike-dasm these patterns were disassembled incorrectly in RV32C traces, resulting in trace comparison failures.

cva6/sim/Makefile (target_isa): New variable. (vcs-testharness): Pass ISA argument to DASM. (veri-testharness): Ditto. (vcs-uvm): Ditto.

Signed-off-by: Zbigniew Chamski zbigniew.chamski@thalesgroup.com @ASintzoff , @JeanRochCoulon : Please review.

Instruct DASM to use the correct 32/64b ISA for current target.

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