uvmt_cva6_dut_wrap.sv, uvmt_cva6_tb.sv: fix parameter declaration
Created by: JeanRochCoulon
Fix the uvm testbench parameter declaration. Down size the number from 225 downto 224 because verilog array cannot be greater than 2**24
Signed-off-by: Jean-Roch Coulon jean-roch.coulon@thalesgroup.com