Skip to content

Suppress dsim compile warning and support for core testbench

The primary purpose of this PR is to suppress dsim ReadingOutputModport warnings (see #1030 (closed)).

I am sneaking in several updates for the core testbench as well (actually most of the changes in this PR). Note that the core TB cannot compile (yet), but I want to get these updates in to help the USouthhampton team.

Merge request reports

Loading