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The OpenPiton Platform

This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.

CVA6 SDK containing RISC-V tools and Buildroot

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

Eclipse ESCET project main repository.

Aidge bundle repository, which includes the main modules of the Aidge framework, plus the documentation and tutorials.

GT-Gen Core library which accepts ScenarioEngine, Environment and simulation parameters and enables the integrator to execute the simulation.

GT-Gen Core library which accepts ScenarioEngine, Environment and simulation parameters and enables the integrator to execute the simulation.

Julian Skublics etrice fork

eTrice

Aidge meta-repository, which includes the main modules of the Aidge framework as Git submodules, plus the documentation and tutorials.