Explore projects

CVA6-platform is a multicore CVA6 with CV-MESH software and regression platform

This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.

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CV32E40S Design-Verification environment

Small and simple APB interrupt controller

CORE-ET Silicon Platform erbium

Linux kernel source tree

Issues related to the OpenHW Group infra (GtHub, Mattermost, ...)

Eclipse/FreeRTOS/core-v-mcu example program

RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

CORE-ET Silicon Platform