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OpenHW Group / backup-20240407 / osdforum.org
Eclipse Public License 2.0The Open Source Developer Forum is a workshop that brings open source software and hardware (chips, boards and systems) developers together to collaborate and learn.
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OpenHW Group / backup-20240407 / cvfpu
Apache License 2.0Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
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OpenHW Group / backup-20240407 / core-v-mcu-sdk-examples
Apache License 2.0Example SDK applications for DevKit
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CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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OpenHW Group / backup-20240407 / riscv_vm
Apache License 2.0Instructions to import Ubuntu guest Virtual Machine for RISC-V development for the VEGA board
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RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
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RTL code for implementation of dual-core trusted MCU
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Run an AWS CodeBuild project as a step in a GitHub Actions workflow job.
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OpenHW Group / backup-20240407 / corev-llvm-project
Apache License 2.0Updated -
OpenHW Group / backup-20240407 / embdebug-target-core-v
Apache License 2.0Updated -
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
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CV32E40X Design-Verification environment
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OpenHW Group / backup-20240407 / cv32e41p
Apache License 2.04 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
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Documentation for the OpenHW Group's set of CORE-V RISC-V cores
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Eclipse/FreeRTOS/core-v-mcu example program
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OpenHW Group / backup-20240407 / cv32e40x
Apache License 2.04 stage, in-order, compute RISC-V core based on the CV32E40P
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