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Functional verification project for the CORE-V family of RISC-V cores.
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OpenHW Group / backup-20240512 / cv32e40p
Apache License 2.0CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
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OpenHW Group / backup-20240512 / force-riscv
Apache License 2.0Instruction Set Generator initially contributed by Futurewei
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