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Instructions to import Ubuntu guest Virtual Machine for RISC-V development for the VEGA board

Aidge's CUDA backend, written in C++/CUDA and using NVidia's CuDNN and CuBLAS libraries. Required for training and inference on NVidia's GPUs

This project maintains the official specification, Technology Compatiblity Kit (TCK), and documentation for the AsciiDoc language and its APIs. The AsciiDoc Language Specification describes the syntax, grammar, and APIs for the AsciiDoc language.

GT-Gen Core library which accepts ScenarioEngine, Environment and simulation parameters and enables the integrator to execute the simulation.

Adopters are organizations that voluntarily show their support for the Eclipse projects.

CORE-V MCU DevKit drivers written with AWS CommonIO approach

Aidge meta-repository, which includes the main modules of the Aidge framework as Git submodules, plus the documentation and tutorials.

This toolset is responsible for synchronizing committers, contributors and settings across all Eclipse Foundation GitHub repositories and organizations.

3rd party: Fork of https://github.com/llvm/llvm-project/

Papyrus for web-browser

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.