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OpenHW Group / backup-20240512 / cva5
Apache License 2.0The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
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Eclipse Projects / aidge / aidge_interop_torch
Eclipse Public License 2.0Updated -
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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Paolo Bono / NFVCL-NG
GNU General Public License v3.0 or laterUpdated -
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
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Eclipse Projects / Eclipse Signalling Engineering Toolbox / Build
Eclipse Public License 2.0Updated -
Eclipse Research Labs / NEMO Project / NEMO Service Management / Intent-based SDK_API / Intent API
Apache License 2.0Updated -
OpenHW Group / backup-20240512 / cve2
Apache License 2.0The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.
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Michal Szczepanski / aidge_core
Eclipse Public License 2.0Updated -
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Eclipse Projects / Eclipse Oniro Compliance Toolchain / toolchain / tinfoilhat
GNU General Public License v2.0 onlyTools to extract and aggregate metadata and sources from multiple yocto builds
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Mark Pecze / Integration Tests_mark
Apache License 2.0Updated -
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Michal Szczepanski / aidge_backend_cpu
Eclipse Public License 2.0Updated -
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OpenHW Group / backup-20240512 / force-riscv
Apache License 2.0Instruction Set Generator initially contributed by Futurewei
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Eclipse Projects / aidge / aidge_backend_opencv
Eclipse Public License 2.0Aidge's OpenCV backend, written in C++, for image data loading and some CV operators implementation
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Mihir Mehta / eclipse-graphene
Apache License 2.0Graphene installation and maintenance scripts
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