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Commit c5f7c039 authored by Craig Topper's avatar Craig Topper
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[X86] Add x, t and g modifiers for inline asm

This patch adds the x, t and g modifiers for inline asm from GCC. These will print a vector register as xmm*, ymm* or zmm* respectively.

I also fixed register names with modifiers with inteldialect so they are no longer printed with a leading %.

Patch by Amanieu d'Antras

Differential Revision: https://reviews.llvm.org/D78977
parent a1bd5cd5
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...@@ -407,7 +407,7 @@ void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI, ...@@ -407,7 +407,7 @@ void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO, static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
char Mode, raw_ostream &O) { char Mode, raw_ostream &O) {
Register Reg = MO.getReg(); Register Reg = MO.getReg();
bool EmitPercent = true; bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
if (!X86::GR8RegClass.contains(Reg) && if (!X86::GR8RegClass.contains(Reg) &&
!X86::GR16RegClass.contains(Reg) && !X86::GR16RegClass.contains(Reg) &&
...@@ -446,6 +446,42 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO, ...@@ -446,6 +446,42 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
return false; return false;
} }
static bool printAsmVRegister(X86AsmPrinter &P, const MachineOperand &MO,
char Mode, raw_ostream &O) {
unsigned Reg = MO.getReg();
bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
unsigned Index;
if (X86::VR128XRegClass.contains(Reg))
Index = Reg - X86::XMM0;
else if (X86::VR256XRegClass.contains(Reg))
Index = Reg - X86::YMM0;
else if (X86::VR512RegClass.contains(Reg))
Index = Reg - X86::ZMM0;
else
return true;
switch (Mode) {
default: // Unknown mode.
return true;
case 'x': // Print V4SFmode register
Reg = X86::XMM0 + Index;
break;
case 't': // Print V8SFmode register
Reg = X86::YMM0 + Index;
break;
case 'g': // Print V16SFmode register
Reg = X86::ZMM0 + Index;
break;
}
if (EmitPercent)
O << '%';
O << X86ATTInstPrinter::getRegisterName(Reg);
return false;
}
/// PrintAsmOperand - Print out an operand for an inline asm expression. /// PrintAsmOperand - Print out an operand for an inline asm expression.
/// ///
bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
...@@ -520,6 +556,14 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, ...@@ -520,6 +556,14 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
PrintOperand(MI, OpNo, O); PrintOperand(MI, OpNo, O);
return false; return false;
case 'x': // Print V4SFmode register
case 't': // Print V8SFmode register
case 'g': // Print V16SFmode register
if (MO.isReg())
return printAsmVRegister(*this, MO, ExtraCode[0], O);
PrintOperand(MI, OpNo, O);
return false;
case 'P': // This is the operand of a call, treat specially. case 'P': // This is the operand of a call, treat specially.
PrintPCRelImm(MI, OpNo, O); PrintPCRelImm(MI, OpNo, O);
return false; return false;
......
; RUN: llc < %s | FileCheck %s
define void @test1() {
; CHECK-LABEL: test1:
; CHECK: vmovaps %xmm0, %xmm0
; CHECK: vmovaps %ymm0, %ymm0
; CHECK: vmovaps %zmm0, %zmm0
tail call void asm sideeffect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}
define void @test2() {
; CHECK-LABEL: test2:
; CHECK: vmovaps %xmm0, %xmm0
; CHECK: vmovaps %ymm0, %ymm0
; CHECK: vmovaps %zmm0, %zmm0
tail call void asm sideeffect inteldialect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}
define void @test3() {
; CHECK-LABEL: test3:
; CHECK: movb %al, %al
; CHECK: movb %ah, %ah
; CHECK: movw %ax, %ax
; CHECK: movl %eax, %eax
; CHECK: movq %rax, %rax
tail call void asm sideeffect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}
define void @test4() {
; CHECK-LABEL: test4:
; CHECK: movb %al, %al
; CHECK: movb %ah, %ah
; CHECK: movw %ax, %ax
; CHECK: movl %eax, %eax
; CHECK: movq %rax, %rax
tail call void asm sideeffect inteldialect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
tail call void asm sideeffect inteldialect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}
; RUN: not llc -mtriple=x86_64-- < %s 2>&1 | FileCheck %s ; RUN: not llc -mtriple=x86_64-- < %s 2>&1 | FileCheck %s
;CHECK: error: invalid operand in inline asm: 'vmovd ${1:x}, $0' ;CHECK: error: invalid operand in inline asm: 'vmovd ${1:k}, $0'
define i32 @foo() { define i32 @foo() {
entry: entry:
%0 = tail call i32 asm sideeffect "vmovd ${1:x}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>) %0 = tail call i32 asm sideeffect "vmovd ${1:k}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
ret i32 %0 ret i32 %0
} }
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