1/4 [
Author: Darren Hart
Email: dvhart@linux.intel.com
Subject: mfd: lpc_sch: Accomodate partial population of the MFD devices
Date: Sat, 18 May 2013 14:45:52 -0700

commit 5829e9b64e657560e840dc0ecfee177cb002cd69 upstream

The current probe aborts if any of the 3 base address registers are
disabled. On a TunnelCreek system I am working on, this resulted in the
SMBIOS and GPIO devices being removed when it couldn't read the base
address for the watchdog timer.

This patch accommodates partial population of the lpc_sch_cells array and
only aborts if all the base address registers are disabled. A max size
array is allocated and the individual device cells are added to it after
their base addresses are successfully determined. This simplifies the
code a bit by removing the need for the separate tunnelcreek cells array
and combining some of the add/remove logic.

Cc: Grant Likely <grant.likely@secretlab.ca>,
Cc: Denis Turischev <denis@compulab.co.il>,
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
]

2/4 [
Author: Darren Hart
Email: dvhart@linux.intel.com
Subject: gpio-sch: Allow for more than 8 lines in the resume well
Date: Sat, 18 May 2013 14:45:53 -0700

commit 3cbf1822b5fd98eccb641c94c8cd2455fdad9221 upstream

The E6xx (TunnelCreek) CPUs have 9 GPIO lines in the resume well. Update
the resume functions to allow for more than 8 GPIO lines, using the core
functions as a template.

Cc: <stable@vger.kernel.org> # 3.4.x
Cc: <stable@vger.kernel.org> # 3.8.x
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
]

3/4 [
Author: Darren Hart
Email: dvhart@linux.intel.com
Subject: pch_gbe: Use PCH_GBE_PHY_REGS_LEN instead of 32
Date: Sat, 18 May 2013 14:45:55 -0700

Avoid using magic numbers when we have perfectly good defines just lying
around.

Signed-off-by: Darren Hart <dvhart@linux.intel.com>
]

4/4 [
Author: Darren Hart
Email: darren@dvhart.com
Subject: pch_uart: Add uart_clk selection for the MinnowBoard
Date: Sat, 18 May 2013 14:45:56 -0700

Use DMI_BOARD_NAME to determine if we are running on a MinnowBoard and
set the uart clock to 50MHz if so. This removes the need to pass the
user_uartclk to the kernel at boot time.

Signed-off-by: Darren Hart <dvhart@linux.intel.com>
]

Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>