Merge requests · Eclipse Projects / Eclipse ESCET (Supervisory Control Engineering Toolkit) / escet · GitLab

#884 PLCgen: Improve handling of diferent value types in input/output

!957 · created Jul 01, 2024 by Albert Hofkamp v5.0
CIF TypeBug
- Merged
- 20
updated Jul 04, 2024
#877 PLCgen: Avoid getting parenthesis in real variable declarations

!956 · created Jul 01, 2024 by Albert Hofkamp v5.0
CIF TypeBug
- Merged
- 1
- Approved
updated Sep 25, 2024
#881 Cleanup box writing

!950 · created Jun 28, 2024 by Albert Hofkamp v5.0
CIF TypeEnhancement
- Merged
- 38
- Approved
updated Jul 12, 2024
#887 CIF benchmark overview script: generate proper row-averages.

!947 · created Jun 25, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- 7
- Approved
updated Jun 26, 2024
#882 CIF explorer statistic output: 'states space' -> 'state space'.

!944 · created Jun 22, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- Approved
updated Jun 22, 2024
#867 Use `relnextIntersection` and `relprevIntersection`

!942 · created Jun 21, 2024 by Wytse Oortwijn v4.0
CIF TypeEnhancement
- Merged
- 9
- Approved
updated Jun 21, 2024
#878 Accounting for runtime errors earlier during data based synthesis

!941 · created Jun 20, 2024 by Wytse Oortwijn v4.0
CIF TypeEnhancement
- Merged
- 21
- Approved
updated Jul 09, 2024
#862 #679 PLCgen S7 SEL function application should always use formal notation.

!940 · created Jun 20, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- Approved
updated Jun 21, 2024
#877 #679 PLCgen: Recognize more forms of integer literals.

!939 · created Jun 20, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- 11
- Approved
updated Jun 21, 2024
#691 CIF explorer: use proper edge vs transition terminology

!938 · created Jun 18, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- 18
updated Jun 21, 2024
#876 Drop power and exponentiation.

!936 · created Jun 18, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- Approved
updated Jun 18, 2024
#847 Fix PLCgen PLC code for EXPT and MIN/MAX.

!934 · created Jun 17, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- 2
- Approved
updated Jun 18, 2024
#848 PLCgen Fix S7-300 PLC compile problem with double negations.

!933 · created Jun 17, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- 2
- Approved
updated Sep 08, 2024
#679 #860 PLCgen: Ensure that the main program always has a proper PLC statement.

!932 · created Jun 17, 2024 by Albert Hofkamp v4.0
CIF TypeBug
- Merged
- 7
- Approved
updated Jun 18, 2024
#410 CIF controller properties checker: add non-blocking under control check

!931 · created Jun 16, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- 56
- Approved
updated Jun 25, 2024
#873 CIF data-based synthesis: allow converting resulting predicates explicitly to only CNF or DNF

!930 · created Jun 15, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- 3
updated Jun 17, 2024
#871 Use more BddUtils.free in CifBddEdge.

!928 · created Jun 14, 2024 by Dennis Hendriks v4.0
CIF TypeEnhancement
- Merged
- Approved
updated Jun 17, 2024
#866 Use partial transition relations for improving data based synthesis performance

!927 · created Jun 14, 2024 by Wytse Oortwijn v4.0
CIF TypeEnhancement
- Merged
- 20
- Approved
updated Jun 14, 2024
#865 Use relnext and relprev for improving data based synthesis performance

!926 · created Jun 13, 2024 by Wytse Oortwijn v4.0
CIF TypeEnhancement
- Merged
- 2
- Approved
updated Jun 13, 2024
#625 Upgrade to JavaBDD 7.0.0.

!925 · created Jun 11, 2024 by Dennis Hendriks v4.0
CIF TypeBug
- Merged
- Approved
updated Aug 05, 2024

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