aidge_arm kernels need refactoring

We need to update existing aidge_arm kernel to use templates as much as possible and to make them use memory manager for handling memory wrapping.

Such kernels have been developed in N2D2: https://github.com/CEA-LIST/N2D2/blob/master/export/CPP_STM32/include/Network.hpp

We should use them as much as possible !

List of kernels to update:

• Sub
• Mul
• Add
• Div
• MatMul
• Softmax
• Slice
• Sigmoid
• Reshape
• ReLU
• Concat
• BatchNorm
• Atan

added Refactoring🎨 label

assigned to @20cent

Kernels implementations

Kernels	Status	Priority	Difficulties	Comments
Add	In progress	High	[In progress] Broadcast	[Linked with Div, Mul, Sub] External and generic broadcast may need a revision
Atan	Done	Low
BatchNorm	Done	Low
Concat	Done	Low
Div	In progress	High	[In progress] Broadcast	[Linked with Add, Mul, Sub] External and generic broadcast may need a revision
MatMul	Done	Low	[Resolved] Global comprehension of MatMul Operand
Mul	In progress	High	[In progress] Broadcast	[Linked with Add, Div, Sub] External and generic broadcast may need a revision
ReLU	Done	Low
Reshape	Done	Low
Sigmoid	Done	Low
Slice	Done	Low
SoftMax	Done	Low
Sub	In progress	High	[In progress] Broadcast	[Linked with Add, Div, Mul] External and generic broadcast may need a revision

Kernels Benchmark

Steps

• Jupyter Notebook for STM32 target export
  • Python script to generate the main file. Takes as parameters the kernel to test, the implementations, and optionally a dataset file.
  • Default dataset template (Tensor, parameters to vary)
  • For each operand, the method to perform the tests. E.g., vary the tensor size, then vary the dilation, then vary epsilon, etc.
• Script to parse useful data from UART output
• Script to generate graphs from the useful data

Note: On the STM32 target, execution and retrieval of raw data via UART, to my knowledge, unfortunately cannot be scripted.

mentioned in merge request !21