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Commit 037e6205 authored by Thibault Allenet's avatar Thibault Allenet
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Update the export registry for tensor with new aidge datatypes

parent 18c36ba4
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2 merge requests!318[Upd] release verision 0.5.0,!262Low bit support for ARM Cortex-M export
Pipeline #61740 passed
......@@ -80,6 +80,14 @@ class ExportLib(aidge_core.OperatorImpl):
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.uint32]))
aidge_core.register_Tensor([self._name, aidge_core.dtype.uint64],
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.uint64]))
aidge_core.register_Tensor([self._name, aidge_core.dtype.int4],
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.int4]))
aidge_core.register_Tensor([self._name, aidge_core.dtype.uint4],
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.uint4]))
aidge_core.register_Tensor([self._name, aidge_core.dtype.dual_int4],
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.dual_int4]))
aidge_core.register_Tensor([self._name, aidge_core.dtype.dual_uint4],
aidge_core.get_key_value_Tensor(["cpu", aidge_core.dtype.dual_uint4]))
@classproperty
def _export_node_registry(cls) -> Dict[str, List['ExportNode']]:
......
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