Export refactor

Context

&12

Changes

• Changes linked to export refactor: aidge_core!163 (merged)
• Fix aidge#180 (closed)
• Remove warning in GridSampleImpl (cast of T* const become T*)

aidge_backend_cpu/unit_tests/test_scheduler.py

@@ -13,9 +13,10 @@ class test_scheduler(unittest.TestCase):
         pass
 
     def test_relu_forward(self):
-        values = np.arange(6) - 3
 
-        input_node = aidge_core.Producer(aidge_core.Tensor(values), "Input")
+        t = aidge_core.Tensor(np.arange(6, dtype=np.int32) - 3)
+
+        input_node = aidge_core.Producer(t)
         relu = aidge_core.ReLU()
         input_node.add_child(relu)
 
@@ -34,7 +35,7 @@ class test_scheduler(unittest.TestCase):
         out_tensor = relu.get_operator().get_output(0)
         expected_out = [0,0,0,0,1,2]
         for i in range(len(expected_out)):
-            self.assertEqual(expected_out[i], out_tensor[i])
+            self.assertEqual(expected_out[i], out_tensor[i], f"On idx {i}")
 
     def test_sequential_scheduling(self):
         input_data =  np.array([0]).astype(np.float32)
@@ -69,7 +70,7 @@ class test_scheduler(unittest.TestCase):
             aidge_core.Producer(input_tensor, "X"),
             aidge_core.FC(1, 50, name='0'),
             aidge_core.parallel([aidge_core.FC(50, 50, name='1'), aidge_core.FC(50, 50, name='3')]),
-            aidge_core.Add(2, name='2'),
+            aidge_core.Add(name='2'),
         ])
 
         EXPECTED_SCHEDULE = [['0', '1', '3', '2'],  ['0', '3', '1', '2']] # Both scheduling are valid !