Temporary master branch

include/aidge/backend/cpu/data/TensorImpl.hpp

@@ -3,8 +3,11 @@
 
 #include "aidge/backend/TensorImpl.hpp"
 #include "aidge/data/Tensor.hpp"
+#include "aidge/data/half.hpp"
 #include "aidge/utils/Registrar.hpp"
 #include "aidge/utils/Types.h"
+#include "aidge/utils/ErrorHandling.hpp"
+#include "aidge/utils/future_std/span.hpp"
 
 namespace Aidge {
 template <class T>
@@ -12,7 +15,10 @@ class TensorImpl_cpu : public TensorImpl {
    private:
     const Tensor &mTensor;  // Impl needs to access Tensor information, but is not
                             // supposed to change it!
-    std::vector<T> mData;
+    /// Pointer to the data and its capacity
+    future_std::span<T> mData;
+    /// If this instance own the data, std::unique_ptr manages it
+    std::unique_ptr<T[]> mDataOwner;
 
    public:
     static constexpr const char *Backend = "cpu";
@@ -20,9 +26,12 @@ class TensorImpl_cpu : public TensorImpl {
     TensorImpl_cpu(const Tensor &tensor) : TensorImpl(Backend), mTensor(tensor) {}
 
     bool operator==(const TensorImpl &otherImpl) const override final {
+        const auto& typedOtherImpl = reinterpret_cast<const TensorImpl_cpu<T> &>(otherImpl);
+        AIDGE_INTERNAL_ASSERT(typedOtherImpl.data().size() >= mTensor.size());
+
         std::size_t i = 0;
         for (; i < mTensor.size() &&
-               mData[i] == reinterpret_cast<const TensorImpl_cpu<T> &>(otherImpl).data()[i];
+               mData[i] == typedOtherImpl.data()[i];
              ++i) {
         }
         return i == mTensor.size();
@@ -33,36 +42,129 @@ class TensorImpl_cpu : public TensorImpl {
     }
 
     // native interface
-    const std::vector<T> &data() const { return mData; }
+    const future_std::span<T>& data() const { return mData; }
 
+    std::size_t size() const override { return mData.size(); }
     std::size_t scalarSize() const override { return sizeof(T); }
 
-    void copy(const void *src, NbElts_t length) override {
+    void setDevice(DeviceIdx_t device) override {
+        AIDGE_ASSERT(device == 0, "device cannot be != 0 for CPU backend");
+    }
+
+    void copy(const void *src, NbElts_t length, NbElts_t offset = 0) override {
+        AIDGE_ASSERT(length <= mData.size() || length <= mTensor.size(), "copy length is above capacity");
+        std::copy(static_cast<const T *>(src), static_cast<const T *>(src) + length,
+                  static_cast<T *>(rawPtr()) + offset);
+    }
+
+    void copyCast(const void *src, NbElts_t length, const DataType srcDt) override {
+        if (length == 0) {
+            return;
+        }
+
+        AIDGE_ASSERT(length <= mData.size() || length <= mTensor.size(), "copy length is above capacity");
+        if (srcDt == DataType::Float64) {
+            std::copy(static_cast<const double*>(src), static_cast<const double*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Float32) {
+            std::copy(static_cast<const float*>(src), static_cast<const float*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Float16) {
+            std::copy(static_cast<const half_float::half*>(src), static_cast<const half_float::half*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Int64) {
+            std::copy(static_cast<const int64_t*>(src), static_cast<const int64_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::UInt64) {
+            std::copy(static_cast<const uint64_t*>(src), static_cast<const uint64_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Int32) {
+            std::copy(static_cast<const int32_t*>(src), static_cast<const int32_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::UInt32) {
+            std::copy(static_cast<const uint32_t*>(src), static_cast<const uint32_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Int16) {
+            std::copy(static_cast<const int16_t*>(src), static_cast<const int16_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::UInt16) {
+            std::copy(static_cast<const uint16_t*>(src), static_cast<const uint16_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::Int8) {
+            std::copy(static_cast<const int8_t*>(src), static_cast<const int8_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else if (srcDt == DataType::UInt8) {
+            std::copy(static_cast<const uint8_t*>(src), static_cast<const uint8_t*>(src) + length,
+                    static_cast<T *>(rawPtr()));
+        }
+        else {
+            AIDGE_THROW_OR_ABORT(std::runtime_error, "Unsupported data type.");
+        }
+    }
+
+    void copyFromDevice(const void *src, NbElts_t length, const std::pair<std::string, DeviceIdx_t>& device) override {
+        AIDGE_ASSERT(device.first == Backend, "backend must match");
+        AIDGE_ASSERT(device.second == 0, "device cannot be != 0 for CPU backend");
+        copy(src, length);
+    }
+
+    void copyFromHost(const void *src, NbElts_t length) override {
+        copy(src, length);
+    }
+
+    void copyToHost(void *dst, NbElts_t length) const override {
+        AIDGE_ASSERT(length <= mData.size() || length <= mTensor.size(), "copy length is above capacity");
+        const T* src = static_cast<const T*>(rawPtr());
         std::copy(static_cast<const T *>(src), static_cast<const T *>(src) + length,
-                  static_cast<T *>(rawPtr()));
+                  static_cast<T *>(dst));
     }
 
-    void *rawPtr() override {
-        lazyInit(mData);
-        return mData.data();
+    void *rawPtr(NbElts_t offset = 0) override {
+        lazyInit();
+        return (mData.data() + offset);
     };
 
-   void* getRaw(std::size_t idx){
-       return  static_cast<void*>(static_cast<T *>(rawPtr()) + idx);
-   };
+    const void *rawPtr(NbElts_t offset = 0) const override {
+        AIDGE_ASSERT(mData.size() >= mTensor.size(), "accessing uninitialized const rawPtr");
+        return (mData.data() + offset);
+    };
 
-    virtual ~TensorImpl_cpu() = default;
+    void *hostPtr(NbElts_t offset = 0) override {
+        lazyInit();
+        return (mData.data() + offset);
+    };
 
-    void setRawPtr(void *ptr) override final {
-        T *newPtr = static_cast<T *>(ptr);
-        mData = std::vector<T>(newPtr, newPtr + mTensor.size());
+    const void *hostPtr(NbElts_t offset = 0) const override {
+        AIDGE_ASSERT(mData.size() >= mTensor.size(), "accessing uninitialized const hostPtr");
+        return (mData.data() + offset);
     };
 
-   private:
-    void lazyInit(std::vector<T> &data) {
-        assert(mTensor.dataType() == NativeType<T>::type);
+    void setRawPtr(void *ptr, NbElts_t length) override final {
+        AIDGE_ASSERT(length >= mTensor.size(), "trying to set raw pointer of insufficient capacity");
+        mData = future_std::span<T>(static_cast<T *>(ptr), length);
+        mDataOwner.reset();
+    };
+
+    virtual ~TensorImpl_cpu() = default;
 
-        if (data.size() != mTensor.size()) data.resize(mTensor.size());
+private:
+    void lazyInit() {
+        if (mData.size() < mTensor.size()) {
+            // Need more data, a re-allocation will occur
+            AIDGE_ASSERT(mData.empty() || mDataOwner != nullptr, "trying to enlarge non-owned data");
+            mDataOwner.reset(new T[mTensor.size()]);
+            mData = future_std::span<T>(mDataOwner.get(), mTensor.size());
+        }
     }
 };
 
@@ -71,6 +173,8 @@ static Registrar<Tensor> registrarTensorImpl_cpu_Float64(
         {"cpu", DataType::Float64}, Aidge::TensorImpl_cpu<double>::create);
 static Registrar<Tensor> registrarTensorImpl_cpu_Float32(
         {"cpu", DataType::Float32}, Aidge::TensorImpl_cpu<float>::create);
+static Registrar<Tensor> registrarTensorImpl_cpu_Float16(
+        {"cpu", DataType::Float16}, Aidge::TensorImpl_cpu<half_float::half>::create);
 static Registrar<Tensor> registrarTensorImpl_cpu_Int32(
         {"cpu", DataType::Int32}, Aidge::TensorImpl_cpu<int>::create);
 }  // namespace