Low bit support for ARM Cortex-M export

• Implementation of WeightInterleaving & Tests for Operator & Apply WeightInterleaving recipe

Closes : aidge_export_arm_cortexm#22 (closed)

added StatusWork in Progress label

assigned to @thibaultallenet

added 10 commits

• 95b0d1cd...b39f112b - 8 commits from branch dev
• a9b92e7f - Add WeightInterleaving Operator CPU Implementation
• ac651b61 - Add convolution registrar entry for int4 without implementation - Need for generate scheduling

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requested review from @cmoineau

added 29 commits

• ac651b61...8b99d4f1 - 22 commits from branch dev
• 0bed528e - Add WeightInterleaving Operator CPU Implementation
• 95b0d1cd - Add convolution registrar entry for int4 without implementation - Need for generate scheduling
• 03c5ea29 - Merge branch 'dev' into low_bit_support_arm
• b4fe25f3 - Merge branch 'low_bit_support_arm' of...
• f8cea904 - Merge branch 'dev' into low_bit_support_arm
• fce43c2d - Update implementation kernels for new lowbit integer datatypes
• 086243bc - Add test for applyweightInterleaving recipe

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requested review from @olivierbichler

marked this merge request as ready

marked the checklist item Python binding of WeightInterleaving as completed

added 18 commits

• 086243bc...ed718fc0 - 17 commits from branch dev
• 57842cb5 - Merge branch 'dev' into low_bit_support_arm

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added 1 commit

• 85c546e0 - remove registry for int4 uint4 convImpl

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changed the description

removed StatusWork in Progress label

mentioned in issue aidge_export_arm_cortexm#22 (closed)

changed the description

added 7 commits

• 85c546e0...279f405c - 2 commits from branch dev
• a8bb0d4f - Add WeightInterleaving Operator CPU Implementation
• de4d494a - Add convolution registrar entry for int4 without implementation - Need for generate scheduling
• 00f3505a - Update implementation kernels for new lowbit integer datatypes
• 2e797d8b - Add test for applyweightInterleaving recipe
• 1bbf6240 - remove registry for int4 uint4 convImpl

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enabled an automatic merge when all merge checks for 1bbf6240 pass

aborted the automatic merge because target branch was updated

approved this merge request

added 7 commits

• 1bbf6240...7593372e - 2 commits from branch dev
• 205c534e - Add WeightInterleaving Operator CPU Implementation
• 50c63d53 - Add convolution registrar entry for int4 without implementation - Need for generate scheduling
• 70f4383a - Update implementation kernels for new lowbit integer datatypes
• e893934a - Add test for applyweightInterleaving recipe
• 2a7f7447 - remove registry for int4 uint4 convImpl

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