Merge branch 'fix_multiple-small-fixes' into 'dev'

Multiple small fixes

See merge request !103

include/aidge/backend/cpu/operator/ConvDepthWiseImpl_kernels.hpp

@@ -149,7 +149,6 @@ void ConvDepthWiseImpl2D_cpu_forward_kernel(const std::array<DimSize_t, 2>& stri
     // input  (batch, ch, Xin, Yin)
     // weight (outCh, ch, kernelX, kernelY)
     // does not take Dilation attribute into account
-    using signedsize = std::make_signed<std::size_t>::type;
     const std::size_t outChannels_s =  oxSize * oySize;
 
     if (dilated_kernel_x ==3 && dilated_kernel_y == 3) {
@@ -232,13 +231,13 @@ void ConvDepthWiseImpl2D_cpu_forward_kernel(const std::array<DimSize_t, 2>& stri
                     for (std::size_t oy = 0; oy < oySize; ++oy) {
 
                         const std::size_t oIndexFull = ox*oySize + oy;
-                        const signedsize ix = static_cast<signedsize>(ox * strideDims[0]);
-                        const signedsize iy = static_cast<signedsize>(oy * strideDims[1]);
+                        const std::size_t ix = ox * strideDims[0];
+                        const std::size_t iy = oy * strideDims[1];
 
                         for (std::size_t sx = 0; sx*dilationDims[0] < dilated_kernel_x; ++sx) {
                             for (std::size_t sy = 0; sy*dilationDims[1] < dilated_kernel_y; ++sy) {
                                 output[oIndexFull] += weights[wIndex + sx*kernelDims[1] + sy] *
-                                                        input[iIndex + static_cast<std::size_t>(ix+static_cast<signedsize>(sx*dilationDims[0]))*inputDims[3] + static_cast<std::size_t>(iy+static_cast<signedsize>(sy*dilationDims[1]))];
+                                                        input[iIndex + static_cast<std::size_t>(ix + sx*dilationDims[0])*inputDims[3] + static_cast<std::size_t>(iy + sy*dilationDims[1])];
                             }
                         }
                     }

include/aidge/backend/cpu/operator/ConvImpl_kernels.hpp

@@ -158,7 +158,6 @@ void ConvImpl2D_cpu_forward_kernel(const std::array<DimSize_t, 2>& strideDims,
     // weight (outCh, inCh, kernelX, kernelY)
     // does not take Dilation attribute into account
     const std::size_t outChannels_s =  oxSize * oySize;
-    using signedsize = std::make_signed<std::size_t>::type;
 
     if (dilated_kernel_x == 3 && dilated_kernel_y == 3) {
         for (std::size_t batch = 0; batch < inputDims[0]; ++batch) {

include/aidge/backend/cpu/operator/GridSampleImpl_kernels.hpp

@@ -65,7 +65,7 @@ static float update_normalized_coord_with_padding(float coord, Aidge::GridSample
     return coord;
 }
 
-static inline std::int64_t update_unnormalized_coord_with_padding(std::int64_t coord, std::int64_t size, Aidge::GridSample_Op::PaddingMode padding_mode) {
+static std::int64_t update_unnormalized_coord_with_padding(std::int64_t coord, std::int64_t size, Aidge::GridSample_Op::PaddingMode padding_mode) {
     if (!in_bound(coord, 0, size)) {
         // out of bound. switch padding mode
         if (padding_mode == Aidge::GridSample_Op::PaddingMode::Border) {

src/operator/ConvDepthWiseImpl.cpp

@@ -65,7 +65,6 @@ void Aidge::ConvDepthWiseImpl2D_cpu::forward() {
 
     AIDGE_ASSERT(op_.getInput(0), "missing input #0 in ConvDepthWise Operator");
     AIDGE_ASSERT(op_.getInput(1), "missing input #1 in ConvDepthWise Operator");
-    AIDGE_ASSERT(op_.getInput(2), "missing input #2 in ConvDepthWise Operator");
 
     AIDGE_ASSERT((op_.getInput(0)->nbDims() == 4), "support for 4-dimensions tensors only");