Clarification needed: Is "x_compressed_req.instr[1:0] == 2'b 11" legal processor-behavior?

There is one ambiguous sentence in the spec that should be clarified.

What the spec says: A coprocessor may only accept valid 16-bit instructions, i.e. bits [1:0] must not be binary 11..

Two possible interpretations:

1. For a coprocessor to accept a 16-bit instruction, then bits [1:0] must not be binary 11.
2. When a processor offloads a 16-bit instruction, then bits [1:0] must never be binary 11.

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It seems the core-v-verif xif asserts chose the latter interpretation.

I think the former interpretation seems slightly more reasonable. (So a processor implementation can choose whether it wants to just offload everything, or it can be particular if it wants to.)

In either case, I think the phrasing is ambiguous and needs to be cleared up in the spec.