Customize linker for cv32e40p

Hi,

I'm trying to use the cv32e40p core in a customized system with individual 32 kB memory space for instruction and data memory. However, I do not manage to customize the linker script to create only use signals within this memory space. I use the linker script provided in the bsp folder of the verification core-v-verif repository. The program I intend to initial run is the provided dhrystone.

My inital try was change the MEMORY map to be within my memory size 0x65536 ram (rwxai) : ORIGIN = 0x00000000, LENGTH = 0x64100 dbg (rwxai) : ORIGIN = 0x64200, LENGTH = 0x800

However, when I look at the generated hex_file, some sections are still placed outside my memory map address scope. Does anyone have some pointers to what basics I'm missing to change in the linker script?

Br Saumeister