[BUG] RF write enable is driven by issue interface instead of the result interface

Bug Description

I was reviewing the CVE2 ID stage implementation and had a question regarding the use of the writeback signal for writing to the register file.

According to the documentation, the writeback signal is asserted by the co-processor to indicate that it will write a result into the register file. We initially assumed this signal is only driven during the issue handshake, and expected that the result interface's write enable signal would control the actual write into the register file.

However, in the code (see cve2_id_stage.sv#L504), it appears that the writeback signal is used again to enable writing, even though no data exchange occurs at that point.

Could you clarify why the design uses the writeback signal here instead of the result interface’s write enable? Is there a timing or architectural reason that makes the writeback signal necessary at this stage?

Thanks in advance for the clarification!