Skip to content

CV32E40s compilation issue with hello world

Hi

I have cloned below and not able to run hello world test git clone https://github.com/openhwgroup/core-v-verif/blob/master/cv32e40s/

ERROR:git clone https://github.com/openhwgroup/cv32e40s /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s; cd /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s; git checkout 103056f0deeac8e6cc10244c86bff83d3014f66f fatal: destination path '/Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s' already exists and is not an empty directory. M rtl/cv32e40s_register_file_wrapper.sv HEAD is now at 103056f... Merge pull request #144 from silabs-oivind/mpu_if_data_access


  • Compiling CORE TB and CV32E40S with Verilator

verilator --cc --sv --exe

--Wno-lint --Wno-UNOPTFLAT
--Wno-MODDUP --top-module
tb_top_verilator /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/tb_top_verilator.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/cv32e40s_tb_wrapper.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/tb_riscv/riscv_rvalid_stall.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/tb_riscv/riscv_gnt_stall.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/mm_ram.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/dp_ram.sv
-f /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s/cv32e40s_manifest.flist
/Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s/bhv/cv32e40s_core_log.sv
/Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/tb_top_verilator.cpp --Mdir cobj_dir
-CFLAGS "-std=gnu++11 -O2"
-Wno-BLKANDNBLK +define+COREV_ASSERT_OFF
%Warning-UNPACKED: /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s/rtl/../bhv/cv32e40s_dbg_helper.sv:45:26: Unsupported: Unpacked array in packed struct/union (struct/union converted to unpacked) 45 | rf_addr_t rf_raddr[REGFILE_NUM_READ_PORTS]; | ^ /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s/rtl/../bhv/cv32e40s_core_log.sv:63:1: ... note: In file included from cv32e40s_core_log.sv /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/core-v-cores/cv32e40s/rtl/../bhv/cv32e40s_wrapper.sv:41:1: ... note: In file included from cv32e40s_wrapper.sv ... For warning description see https://verilator.org/warn/UNPACKED?v=5.004 ... Use "/* verilator lint_off UNPACKED */" and lint_on around source to disable this message. %Error-PINNOTFOUND: /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/cv32e40s_tb_wrapper.sv:118:11: Pin not found: 'irq_ack_o' 118 | .irq_ack_o ( irq_ack ), | ^~~~~~~~~ %Error-PINNOTFOUND: /Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/tb/core/cv32e40s_tb_wrapper.sv:119:11: Pin not found: 'irq_id_o' : ... Suggested alternative: 'irq_i' 119 | .irq_id_o ( irq_id_out ), | ^~~~~~~~ %Error: Exiting due to 2 error(s), 1 warning(s) ... See the manual at https://verilator.org/verilator_doc.html for more assistance. make[1]: *** [Makefile:460: testbench_verilator] Error 1 make[1]: Leaving directory '/Projects/marmik_project/hemashri.bhagavati/core-v-verif_bck1/cv32e40s/sim/core' make: *** [Makefile:454: sanity-veri-run] Error 2

we wanted to run with questa but its running with verilator only

command used: make SIMULATOR=vsim