CV32E40P User Manual: specification of privlv CSR

Type

Issues with this CSR as documented:

• privlv is not part of the RISC-V ISA so it needs to be in a "custom" address space.
• The CSR is located at 0xC10, which is "standard read-only" space.
• The "Current Priviledge Level" field contains lots of info that will never relate to CV32E40P.

Location of Issue

1. RTD URL: https://core-v-docs-verif-strat.readthedocs.io/projects/cv32e40p_um/en/latest/control_status_registers.html#privilege-level-privlv
2. core-v-docs Git Hash: 609007a1