OpenHW DV Con participation plus media coverage news

Created by: NaylDSouza

//Please can you add this story on the news page of OpenHWGroup website (https://www.openhwgroup.org/) in the News section just above the New episode of OpenHW TV (Season 2) available to watch) story. Thanks. If you can add the first story on DV Con for the front page and then link to a separate news page linking to (https://www.openhwgroup.org/news) with this and the other two stories too. Thanks//

OpenHW Group at the virtual DVCon, March 1 – 4 2021

Presentation: 'Jump start your RISC-V project with OpenHW' The OpenHW Group are joined by Imperas, Futurewei, Silicon Labs and EM Microelectronic. This paper will address the verification methodology adopted by the OpenHW Verification Task Group to assure commercial standards for quality. Attendees will obtain the ability to use the OpenHW verification environment as a baseline to design and verify a custom RISCV core with their own value-add features.

About DVCon 2021 For more information, visit the event website

OpenHW Group video interview with EDACafe What does OpenHW provide to its members that they can’t necessarily do by themselves, and are there any other member benefits that are particularly compelling? And what can we expect to look forward to seeing the organization achieve in 2021? EDACafe quizzes Rick O'Connor to find out more. View the video

Feature in Semiconductor Engineering Finally, a suggestion to read this article by Rob Van Blommestein at OneSpin Solutions in Semiconductor Engineering on RISC-V Becoming less Risky With The Right Verification.