Imperas error when setting FIOM bit of menvcfg
Created by: jordancarlin
When running run-elf.bash --elf csrwrites.elf the error message below occurs. It appears that the Imperas version is not properly setting the FIOM bit while Wally is.
# Info (IDV) testbench.idv_trace2log.process_event @ 1140: RET,0,29,80003020,"30a0e073 csrsi menvcfg,1 ",,,,CSR30a(menvcfg)=e0000000000000f1 CSRb00(mcycle)=000000000000006d CSRb02(minstret)=000000000000001d,
# Info (IDV) Instruction executed prior to mismatch '0x80003020(main+20): 30a0e073 csrsi menvcfg,1'
# Error (IDV) CSR register value mismatch (HartId:0, PC:0x0000000080003020 main+20):
# Error (IDV) Mismatch 0> CSR 30a (menvcfg)
# Error (IDV) . dut:0xe0000000000000f1
# Error (IDV) . ref:0xe0000000000000f0 STCE:1 PBMTE:1 PME:0 CBZE:1 CBCFE:1 CBIE:3 FIOM:0
# Error (IDV) testbench.idv_trace2api.state_compare @ 1140: MISMATCH