Bug report: wrong sign in fmul.d with RDN rounding mode

Created by: flaviens

Hi there!

I found a bug in FPnew (bug found through Ariane).

Bug

The operand_c should not be signed for floating multiplications using RDN.

Observable consequences

The floating multiplication gives wrong results for some inputs with the RDN rounding mode.

For example, the pseudo assembly code below executes incorrectly:

ft0 = 0x0 # corresponds to value +0.0
ft1 = 0x00000000dc98da8a # corresponds to value +1.82854e-314

fmul.d ft2, ft1, ft0

In the end of the snippet:

• We expect the result to be 0x0, i.e., +0.0
• We get the result 0x8000000000000000, i.e., -0.0

Related issues

This seems to be the underlying cause of the observations made in openhwgroup/core-v-verif#54, openhwgroup/core-v-verif#63, part of openhwgroup/core-v-verif#68, this external issue in core-v-verif and this external issue in cv32e40p.