Incorrect implementation of the FENCE.I instruction detection logic

Created by: zarubaf

Location: cva6/src/decoder.sv (https://github.com/openhwgroup/cva6/blob/master/src/decoder.sv), line 220 to 240.

Details: The RISC-V specification states that the hardware implementations should ignore the imm, rs1, and rs2 fields of the FENCE.I instruction. However, the cv6 implementation expects a hardcoded value of zero in all these fields. Hence, it is flagging valid FENCE.I instructions with non-zero values in these fields as illegal instructions.

For example, the SPIKE successfully executes the FENCE.I instructions with non-zero imm field but cv6 does not.