[BUG] MSTATUS MPP incorrect read value after write

Created by: MarioOpenHWGroup

Is there an existing CVA6 bug for this?

I have searched the existing bug issues

Bug Description

When CVA6 is in embedded configuration (Only M mode) MPP field has just one possible value 0b11. As the MPP field is WARL, it should read a legal value after a write which it can only be 0b11 in the MPP field.

Environment:

Hash: cd0ade19

How to Reproduce:

source ./verif/sim/setup-env.sh
python3 cva6.py --testlist=../tests/testlist_csr_embedded.yaml --test csr_test --iss_yaml cva6.yaml --target cv32a6_embedded --iss=vcs-testharness

Evidence:

In the output/$(date)/vcs-testharness_sim/csr_test.log

   75 core   0: 0x000000008000003e (0x000062f9) c.lui   t0, 0x1e
   76 3 0x000000008000003e (0x62f9) x 5 0x0001e000
   77 core   0: 0x0000000080000040 (0x3002a073) csrs    mstatus, t0
   78 3 0x0000000080000040 (0x3002a073)

A 0x0001e000 value is written which should produce a 0x00001800 when read (MPP set to 0b11as MPP is WARL)

  847 core   0: 0x00000000800020ec (0x30002773) csrr    a4, mstatus
  848 3 0x00000000800020ec (0x30002773) x14 0x00000000