Add note to NMI documentation
Created by: Silabs-ArjanB
We treat NMIs similar to regular interrupts. The User Manual states:
"NMIs update mepc, mcause and mstatus similar to regular interrupts. However, as the faults that result in NMIs are imprecise, the contents of mepc is not guaranteed to point to the instruction after the faulted load or store."
The RISC-V specifications however are not clear about this, see https://github.com/riscv/riscv-isa-manual/issues/756
We should add a note that our behavior is not defined anywhere in the RISC-V specifications.