CSRs that are updated autonomously need to be reported with same timing as RTL would read such CSR

Created by: Silabs-ArjanB

All counter (e.g. mcycle, cycle, cycleh, etc.) CSRs and the MIP CSR are updated autonomosly irrespective of instruction retirement. RVFI needs to report the _rdata values such that they match the value that a CSR read instruction would see them (so basically these values need to propagate through the RVFI pipeline starting in EX).