RVFI interface: Add _n and _we for performance counters and mip as well

Created by: Silabs-ArjanB

The RVFI interface connection to the core currently does not have _n and _we signals for the performance counters and mip. These CSRs are RW CSRs and should have these signals (even though there currently is not a single writeable bit in mip).

With respect to mcycle/minstret the RVFI spec says:

Incrementing those counters should happen "between instructions", this means for example that an instruction that isn't a CSR write to mcycle should always have rvfi_csr_mcycle_rdata == rvfi_csr_mcycle_wdata.

This also implies that rdata and wdata can be different for CSR writes to such counters.