Dummy instruction inserted too early after CSR write

Created by: Silabs-ArjanB

After a CSR write to cpuctrl, the dummy instruction insertion does not observe the written dummy instruction interval (as a dummy instruction can get inserted immediately violating the 1-N interval requirement).

The a_no_count_overflow assertion masks this issue because of it use of rnddummyfreq_written, see https://github.com/openhwgroup/cv32e40s/blob/6f42e427c296120d5a6c1367e8eab574d5c0bbc3/sva/cv32e40s_dummy_instr_sva.sv#L62

All rnddummyfreq_written logic should be removed from that assertion file.