More undefined conditions for HW loops

Reposing here for @tzwaenn

There are various conditions listed in the user manual on undefined behavior for hardware loops for CV32E40P. Looking at this during some experiments for hardware loop support for the Siemens RISC-V verification app with formal verification, some more potentially undefined cases were identified that no sane compiler will generate:

• do not wrap loop bodies (so start address >= end address)
• no self-modifying loops (so setting any register of hwloop x during and iteration of loop x)
• properly entering the loop by executing the instruction at the start address (alternatives are setting count to a value >=2 at a PC location between loop start and end; similarly, setting up all the loop registers, then branch/jump to a location between start and end)