Debug Mode : ebreak instruction does not update dpc, dcsr before retire

Created by: eroom1966

when transitioning into Debug Mode, from Machine mode due to an ebreak instruction. At the point where the ebreak is retured, the dpc and dcsr registers do not contain the correct value. The values are correct 1 cycle after the instruction has retired. This causes a miscompare as these registers are compared at the ebreak retire

(FYI) @MikeOpenHWGroup @silabs-oysteink