Some of the Xpulp instructions use opcodes that are either reserved opcodes or standard opcodes
Created by: Silabs-ArjanB
Some of the Xpulp opcodes have been chosen such that upstreaming of the related tool changes will become impossible unless we change some opcodes. Ideally only 'custom opcodes' are used for Xpulp extensions.
First question to answer:
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Are there enough custom opcodes to host all the Xpulp extensions that are now spread in the reserved and standard opcodes?
Craig Blackmore's original message:
As per the actions of the minutes above, here is a summary of opcode issues followed by a breakdown of opcodes used by each CORE-V extension.
The issues fall into 4 categories:
- Use of standard opcode (e.g. OP, LOAD, BRANCH). Any CORE-V extension that uses these opcodes may conflict with a future RISC-V standard extension.
- Use of reserved opcode. Any CORE-V extension that uses a reserved opcode may conflict with a future RISC-V standard extension.
- Use of custom- opcode. The RISC-V Foundation does not allow any standard extension to use the custom opcodes. Therefore, any CORE-V extension that only uses custom opcodes is guaranteed not to conflict with future standard extensions. However, any custom opcodes must be changed before a CORE-V extension can be accepted as a standard extension.
- Incorrect use of standard opcode. The bitmanip immediate instructions (p.extract, p.extractu, p.insert, p.bclr, p.bset) use OP, but they should use OP-IMM (if we choose to continue using standard opcodes).
Any CORE-V extension that uses standard or reserved opcodes risks conflicting with future standard extensions. Using custom opcodes eliminates that risk, but those opcodes must be changed if the extension is to be standardized. I suspect we would also need a compelling reason to use a reserved opcode rather than fitting into the existing ones. Crucially, whatever encodings we choose now are subject to change during standardization.
Here is a summary of opcodes used by each CORE-V extension:
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PULP bitmanip All instructions use OP. Immediate instructions (p.extract, p.extractu, p.insert, p.bclr, p.bset) should use OP-IMM.
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PULP SIMD - reserved opcode.
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Post-increment load/store - custom-0 opcode.
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PULP general ALU - Add-shift instructions (p.add[u][R]N[r] and p.sub[u][R]N[r]) use custom-3 opcode. Multiply-accumulate instructions use custom-2 opcode. Remaining instructions use OP opcode.
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PULP immediate branching - BRANCH opcode.
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PULP HW loop - custom-3 opcode.
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Xpulpcluster - LOAD opcode.