Retracted interrupt can cause instructions to be skipped

Created by: Silabs-ArjanB

In case an interrupt is made pending for only 1 cycle, then the controller will enter IRQ_FLUSH for one cycle and go back into DECODE the next cycle. If the instruction that is in decode experiences a stall at that point in time, then the instruction is skipped.

In the following example an interrupt is raised for 1 cycle just before the jr that will experience a couple of stall cycles. As you can see in the waveform the jr is not executed at all (the pc_id just increments with 4 all the time).

    csrw 0x300, 0x1f
    csrw 0x304, 0x1f
addi x0, x0, 4
addi x1, x0, 4
addi x2, x0, 4
addi x3, x0, 4
    lw x8, 0(x1)  # add additional wait state in data_rvalid_i to cause required stall
    jr 2034(x8)   # jr will stall because of x8 usage
addi x4, x0, 1
addi x5, x0, 1
addi x6, x0, 1

The same problem can occur for other instructions stalling in ID when coinciding with a retracted interrupt. The issue is one of the underlying issues that causes #439 (closed)-#442 (closed) as well.