Duplicate cv32e40p_sim_clock_gate.sv in compilation | Component:Tool-and-build

Created by: dawidzim

Hey! In cv32e40p/example_tb/core/Makefile is:

RTLSRC_BHV		:= $(wildcard $(RTLSRC_HOME)/bhv/*.sv)

RTLSRC			:= $(RTLSRC_HOME)/bhv/cv32e40p_sim_clock_gate.sv $(filter-out $(RTLSRC_HOME)/rtl/cv32e40p_register_file_latch.sv,\
				$(wildcard $(RTLSRC_HOME)/rtl/*.sv))

File cv32e40p_sim_clock_gate.sv already is in RTLSRC_BHV. I think this is not necessary duplicate this file. So we can just delete this line $(RTLSRC_HOME)/bhv/cv32e40p_sim_clock_gate.sv or use filter-out in RTLSRC_BHV