Non-standard CSRs

Created by: jm4rtin

There is several non-standard CSRs in the core:

• lpstart0
• lpend0
• lpcount0
• lpstart1
• lpend1
• lpcount1
• privlv
• uhartid
• fprec
• mie1
• mip1

Hardware loop CSRs are only present if this feature is enabled (disabled in the current configuration). The uhartid CSR should only be present if user mode is enabled (disabled in the current configuration). It is actually still present even without user mode. The fprec CSR is only present if the FPU is enabled (disabled in the current configuration).

That leaves the privlv CSR still in the current core configuration which needs to be addressed.

If these CSRs stay they should be added to the ISS. Another option is to just remove them if they serve no useful purpose.

The mie1/mip1 CSRs may need a parameter to disable this non-standard feature.