Change the address of some custom CSRs to be in the range reserved for such CSRs

Created by: Silabs-ArjanB

Some of RI5CY's custom CSR are in non-custom ranges and these might therefore cause conflicts with future standard extensions. Also the Hardware Loop CSRs are in the Machine CSR section, which would become an issue once https://github.com/pulp-platform/riscv/issues/130 has been resolved.

My proposal would be:

• Move HWLoop0_START, HWLoop0_END, HWLoop0_COUNTER, HWLoop1_START, HWLoop1_END, HWLoop1_COUNTER somewhere in User CSR custom read/write space (0x800-0x8FF)

• Move duplicated mhartid from 12'h014 into User CSR custom read-only section (0xCC0-0xCFF)

• Move current priv level from 12'hC10 into User CSR custom read-only section (0xCC0-0xCFF) (as 12'hC10 is reserved for hpmcounter16).

• Move fprec from 12'h006 into User CSR custom read/write space (0x800-0x8FF)

• Performance counters.

  • The split of PCER, PCMR, and PCCR over machine and user mode does not make sense to me. PCER, PCMR are accessible in both machine mode and user mode, whereas PCCR is only accessible in machine mode.
  • PCCR is a custom register which is currently located in the 'machine standard read/write region'
  • Why is there a shadow of PCER_USER in PCER_MACHINE, and similarly a shadow of PCMR_USER in PCMR_MACHINE? The way it is implemented currently the PCER_MACHINE and PCMR_MACHINE aliases are not needed (you could always use the *_USER registers in any mode). It would however potentially make sense if these two (i.e. PCER and PCMR) are only accessible in machine mode and if the PCCR was moved to user mode (and made read-only).
  • The following would make most sense to me: PCER and PCMR machine custom read/write section (only); PCCR in user custom read-only section, or maybe even better, replace PCCR by hpmcounter3/hpmcounter3h from the 'Counters' chapter of the RISC-V spec.