Problem with debug tests

Created by: dawidzim

Hey! When I call command: make SIMULATOR=riviera USE_ISS=0 test TEST=debug_test this error show up: make: *** No rule to make target '/home/dawidz/github/core-v-verif/cv32/tests/programs/custom/debug_test/debug_test_0.hex', needed by 'test'. Stop. If I call debug_test_reset work fine. Also in file cv32\regress\cv32_debug.yaml is wrong header:

# Header
name: cv32_interrupt
description: Directed and random interrupt tests for CV32E40P