Skip to content
GitLab
Explore
Sign in
Eclipse Projects
Eclipse ESCET (Supervisory Control Engineering Toolkit)
escet
Merge requests
Open
8
Merged
654
Closed
43
All
705
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Created date
#530 Merge variable orders and orderers for CIF data-based synthesis variable ordering
!501
· created
Feb 12, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
2
updated
Feb 13, 2023
#479 Updated release notes for v0.9-M1.
!502
· created
Feb 14, 2023
by
Dennis Hendriks
v0.9
RelEng/DevOps
Type
Enhancement
Merged
1
updated
Feb 18, 2023
#413 Print counter example path for language equivalence check
!503
· created
Feb 16, 2023
by
Martijn Goorden
v0.9
CIF
Type
Enhancement
Merged
Approved
33
updated
Feb 20, 2023
#531 Add maximum used memory statistics to the CIF data-based synthesis tool
!504
· created
Feb 16, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
5
updated
Feb 18, 2023
#533 Don't show the edge order option in the option dialog anymore.
!505
· created
Feb 16, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Bug
Merged
Approved
0
updated
Feb 17, 2023
#479 develop to master for v0.9-M1
!506
· created
Feb 18, 2023
by
Dennis Hendriks
v0.9
master
RelEng/DevOps
Type
Enhancement
Merged
0
updated
Feb 18, 2023
#535 Fix SynthesisEdge.apply JavaDoc for 'pred' argument.
!507
· created
Feb 18, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Bug
Merged
Approved
0
updated
Feb 20, 2023
#532 Add anonymized version of lithography machine initialization model to CIF benchmarking models
!508
· created
Feb 18, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
Approved
11
updated
Feb 22, 2023
#522 Add cat and mouse tower benchmark models
!509
· created
Feb 19, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
Approved
27
updated
Feb 24, 2023
#536 ToolDef documentation chfileext tool additional formatting.
!510
· created
Feb 19, 2023
by
Dennis Hendriks
v0.9
ToolDef
Type
Bug
Merged
Approved
0
updated
Feb 20, 2023
#454 New output for CIF checks (2nd attempt)
!511
· created
Feb 21, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
12
updated
Mar 03, 2023
#534 Fail build on files not formatted according to the ESCET formatter profile
!512
· created
Feb 21, 2023
by
Dennis Hendriks
RelEng/DevOps
Type
Enhancement
57
updated
Sep 22, 2023
#537 Add Body Comfort System (BCS) benchmarking model.
!513
· created
Feb 22, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
12
updated
Feb 27, 2023
#299 Add warning for duplicated event in state/event exclusion invariant
!514
· created
Feb 24, 2023
by
Ferdie Reijnen
v0.9
CIF
Type
Enhancement
Merged
Approved
78
updated
Mar 02, 2023
#539 Improve CIF data-based synthesis benchmarking overview HTML
!515
· created
Feb 25, 2023
by
Dennis Hendriks
v0.9
CIF
Type
Enhancement
Merged
Approved
8
updated
Mar 04, 2023
#418 Add model for PLC expressions and statements.
!516
· created
Feb 27, 2023
by
Albert Hofkamp
v0.9
CIF
Type
Enhancement
Merged
Approved
100
updated
Apr 13, 2023
#543 Incorrect command line option max memory stats for databased synthesis
!517
· created
Mar 01, 2023
by
Ferdie Reijnen
v0.9
CIF
Type
Bug
Merged
Approved
0
updated
Mar 02, 2023
#540 Refactor AppStream to detect all EOL sequences.
!518
· created
Mar 03, 2023
by
Albert Hofkamp
v0.9
CIF
Type
Bug
Merged
Approved
33
updated
Apr 01, 2023
#544 Event-based synthesis should allow specifications without requirements.
!519
· created
Mar 03, 2023
by
Martijn Goorden
v0.9
CIF
Type
Enhancement
Merged
Approved
6
updated
Mar 04, 2023
#545 DEPENDENCIES.txt update.
!520
· created
Mar 04, 2023
by
Dennis Hendriks
v0.9
RelEng/DevOps
Type
Bug
Merged
0
updated
Mar 04, 2023
Prev
1
…
22
23
24
25
26
27
28
29
30
…
36
Next
