Testfloat on Verilator not progressing

Placeholder David Harris
2024-10-10T14:47:16Z

I started writing sim-testfloat-verilator. It now compiles but seems to hang in the first test.

harris@chips:~/cvw/sim$ ./sim-testfloat-verilator
harris@chips:~/cvw/sim$ time obj_dir/Vtestbenchfp
Running ui32_to_f128_rne.tv vectors
...(no progress)