Possible optimization: tlbcamline.sv

Placeholder Rose Thompson
2024-09-12T17:46:23Z

Return key on the same cycle as write to save one cycle of latency. Check if this increases the critical path.

```
// On a write, set the valid bit high and update the stored key.
// On a flush, zero the valid bit and leave the key unchanged.
// *** Might we want to update stored key right away to output match on the
// write cycle? (using a mux)
flopenr #(1) validbitflop(clk, reset, WriteEnable | TLBFlush, ~TLBFlush, Valid);
flopenr #(KEY_BITS) keyflop(clk, reset, WriteEnable, {SATP_ASID, VPN}, Key);
```