[XIF] LSU may send mpu_status to WB too early

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2023-01-26T10:25:26Z

If there is an offloaded instruction in WB waiting for xif_result_valid, and the MPU blocks a load or store in EX, the lsu_mpu_status_wb may get updated with the LSU instruction related fault before the offloaded instruction is completed.

The MPU does not get backpressure from wb_ready, but rather the LSU internal counter that counts outstanding transactions. When X_EXT=0 this works, but with X_EXT=1 the MPU must take wb_ready into account.