[TASK] <MCU Manual: High Level Architecture>

Description of Done

Accepted pull request covering CORE-V MCU block diagram with main sub-systems The top-level internal system elements and peripherals in the CORE-V MCU Key blocks in the main sub-systems Buses in the CORE-V MCU: APB, secondary buses, and bridges Memory concepts in the CORE-V MCU architecture SRAM Private TCDM Logarithmic interconnect bus

Associated PRs

No response