Combinatorial loop on `s_block_int`

Bug Description

In the apb_gpio module of CORE-V-MCU we have a couple of code blocks that are similar to the code snipit below. This implements a combinatorial loop on s_block_int and is very bad practise. In fact, I am not sure if synthesised gates match the behaviour of the RTL.

always_comb begin
    low =  low_in & ~s_block_int;
    hi  =  hi_in  & ~s_block_int;
end

always_ff @(posedge HCLK, negedge HRESETn) begin
    if (~HRESETn) begin
      s_block_int <= '0;
    end
    else begin
      s_block_int <= low | hi | s_block_int;
      PREADY <= 0;
      if (PSEL && PENABLE) begin  //APB WRITE
        if (PWRITE && ~PREADY) begin
            PREADY <= 1;
            case (PADDR[11:0])
              `REG_INTACK: begin
                s_block_int[PWDATA[7:0]] <= 0;
              end
              // more cases...
            endcase
        end
      end
   end
end // always_ff