Skip to content

added support for riscvOVPsim running and generating instruction coverage for generated elf files

Eclipse Webmaster requested to merge github/fork/Imperas/addSupportForSimulationAndCoverage into master

Created by: Imperas

added support placeholders for cv32e40p and cva6 and included functional coverage for rv64gc with riscvOVPsim woring with FORCE-RISCV

Merge request reports

Copyright © Eclipse Foundation, Inc. All Rights Reserved.     Privacy Policy | Terms of Use | Copyright Agent