Prevent non-xcvmem post-inc load/stores

Created by: MaryBennett

Issue [#64 (closed)]

Files Changed:

• config/riscv/corev.md: Added support for soft/hardfloat normal and post-inc reg-reg load/stores.
• config/riscv/predicates.md: Added predicate to check if operand is non-immediate and non-post-inc.
• config/riscv/riscv.md: Likewise.
• config/riscv/riscv.cc: Clean up.
• testsuite/gcc.target/riscv/cv-mem-sw-compile-5.c: New test.